But of all the ways that researchers have tried to keep pace with the demands of Moore's Law -- that the number of transistors squeezed onto a silicon wafer will double every 18 months -- few gave mechanics much thought.

Not, that is, until a Princeton University researcher this week announced a promising new procedure that he said could have dramatic consequences.

"People's intuition is that mechanical processes are very slow, so imprinting cannot be fast," said Stephen Chou, an electrical engineer and lead researcher on a team that said it may have discovered a way to beat even Moore's Law in terms of speed. "But I knew there is no scientific proof of that."

Increasing Density by 100

In Chou's mechanical method, a quartz die is combined with laser technology to print the minuscule patterns on silicon wafers necessary to make chips.

Chou and his team claim the new process could lead to a cheaper, faster and cleaner way to cram more transistors onto chips -- the only way to make faster chips that, in turn, enable more powerful computers.

They claim their method can increase the density of transistors on silicon chips 100-fold while decreasing the cost of the production process. The new technology is called "laser assisted direct input" (LADI).

Practical Applications

Semiconductor industry experts are not yet excited, however.

"It may be he's got some great idea," Aberdeen Group semiconductor analyst Russ Craig told NewsFactor. "Being able to do something at 10 nanometers certainly is interesting because the industry is struggling to make 130-nanometer technology work right now, and the state-of-the-art stuff is done at 90 [nanometers].

"My guess is [that] if it were inherently useful in the near term, he would have had Intel , Texas Instruments and all those guys all over him," Craig added.

Smaller Is Harder

The current technology used in making chips is called photolithography, the process of transferring, or "etching," geometric shapes onto a mask on the surface of a silicon wafer.

The technique involves focusing an image of the circuits on a chip onto a polymer that has special photosensitive qualities. Either the exposed or unexposed regions of the polymer then are etched away.

At ever-shrinking dimensions, however, the process runs into problems. There are difficulties involved in making features smaller than 130 nanometers on one side. In addition, the process becomes more costly as component size shrinks. (continued...)

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